Taiwan: TSMC partners with Ansys, Synopsys and Cadence for silicon photonics program

Chipmaker TSMC is partnering with Ansys, Synopsys, and Cadence to develop its silicon photonics integration system capabilities.  Engineering firms, Ansys and TSMC are collaborating on the chipmaker’s Compact Universal Photonic Engine (COUPE) silicon photonics integration system while chip design tool provider Synopsys is helping the company optimize photonic integrated circuit (PIC) flow.

To achieve its aim to improve on-package connectivity by eventually bringing 12.8Tbps of optical connectivity to TSMC-made processors, TSMC is developing COUPE technology which uses SoIC-X (System on Integrated Chips) chip packaging technology to stack a 65nm electronic integrated circuit (EIC) on a PIC. TSMC says this technique offers the lowest impedance at the die-to-die interface and therefore improves energy efficiency.

“We are entering an AI-empowered world, where artificial intelligence not only runs in data centers, but PCs, mobile devices, automobiles, and even the Internet of Things,” said TSMC CEO C.C. Wei. At TSMC, we are offering our customers the most comprehensive set of technologies to realize their visions for AI, from the world’s most advanced silicon, to the broadest portfolio of advanced packaging and 3D IC platforms, to specialty technologies that integrate the digital world with the real world,” he said.